Power management in an integrated circuit (IC) may be embodied by way of defining various domains on the IC and a domain may comprise a number of functional blocks. Each of the blocks may be allowed to be switched off according to certain modes of operations of the IC and/or during certain cycles of operation of the IC, thus reducing the consumption of power of a block to a very low level associated with idle state or inactive state of that block.
Tight power management has a special importance in portable small electronic devices, such as handheld Personal Digital Assistant (PDA) devices, personal handheld computers, cellular phones and the like. In order to ensure proper operation of the active blocks on the IC the inactive blocks are typically isolated from the active blocks, to prevent leakage of power or unwanted propagation of signals. The isolation may be done by means of isolation cells (also known as a ‘firewall’). Firewall cells are typically arranged in defined areas on the chip, as depicted in FIG. 1. IC 10 may comprise a plurality of functional blocks such as block 12 and block 16 which may be powered through gated voltage supplies Vccg1 and Vccg2, respectively. Block 12 may comprise at least one active unit 13 and block 16 may comprise at least one active unit 17. Active unit 13 and/or active unit 17 may be a logical unit such as a processor, a gate array, etc., an analog unit such as an analog amplifier, a Radio Frequency (RF) unit etc. At least one output of unit 13 may be the input to unit 17. In order to enable logical and electrical isolation of block 12 from block 16, in cases when one of them is powered and active and the other one is inactive, such as in ‘sleep’ mode, an array 14 of firewall cells 20 may be embodied in or on IC 10. Array 14 is powered by an un-gated voltage supply Vcc1 and is electrically isolated from blocks 12 and 16 on chip 10, as depicted by the outer frame of block 14. The operation of firewall cells 20 is controlled by a power management unit 18, which may also control the connection or disconnection of gated voltage supplies to blocks 12 and 16. Firewall cells array 14 is powered from voltage source or sources which are constantly available, as long as the chip operates. The required supplies of different voltages to block 12 and block 16 are gated voltage supplies Vccg1 and Vccg2; the required supply of voltage to the associated firewall cells array 14, Vcc1 is an un-gated voltage supply. This dictates that the area occupied by firewall cells array 14 be electrically isolated from the neighboring blocks. Electrical isolation of blocks 12 and 16 and of array 14 from one another may be embodied by any known method, such as using N-well technique. Firewall cells 20 may be embodied as a combination of logic units. Power management unit 18 may control the supply of power to blocks 12 and 16 and the operation of firewall cells 20 associated with blocks 12 and 16 so as to isolate block 12 from block 16 when block 12 is shut down by disabling firewall cells 20 and to re-connect the block back to block 16 when it is put back to operation by enabling firewall cells 20. Typically firewall cells 20 are arranged in arrays so that un-gated voltage supply is received from a respective supply layer and may be provided to all cells 20 in array 14. Electrical isolation of array 14 from neighboring blocks cells 20 provides the required isolation of all firewall cells 20 in array 14.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.